Comments

ARM64 – Pi 4 USB Problems – And a Messy Fix.. — 3 Comments

  1. I found the block in the patch patch-5.11-redhat.patch which makes this work:

    — drivers/pci/controller/pcie-brcmstb.c.org 2021-08-31 15:07:02.055978191 +0200
    +++ drivers/pci/controller/pcie-brcmstb.c 2021-08-31 15:07:31.500193106 +0200
    @@ -871,20 +871,21 @@
    struct resource_entry *entry;
    bool ssc_good = false;
    struct resource *res;
    int num_out_wins = 0;
    u16 nlw, cls, lnksta;
    int i, ret, memc;
    u32 tmp, burst, aspm_support;

    /* Reset the bridge */
    pcie->bridge_sw_init_set(pcie, 1);
    + pcie->perst_set(pcie, 1);
    usleep_range(100, 200);

    /* Take the bridge out of reset */
    pcie->bridge_sw_init_set(pcie, 0);

    tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
    tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
    writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
    /* Wait for SerDes to be stable */
    usleep_range(100, 200);

  2. … if you want in 5.13.13 also 4 CPUs instead of one:

    — arch/arm/boot/dts/bcm2837.dtsi.org 2021-08-30 03:48:45.998742555 +0200
    +++ arch/arm/boot/dts/bcm2837.dtsi 2021-08-30 03:52:43.390480156 +0200
    @@ -31,54 +31,54 @@
    interrupts = , // PHYS_SECURE_PPI
    , // PHYS_NONSECURE_PPI
    , // VIRT_PPI
    ; // HYP_PPI
    always-on;
    };

    cpus: cpus {
    #address-cells = ;
    #size-cells = ;
    – enable-method = “brcm,bcm2836-smp”; // for ARM 32-bit

    cpu0: cpu@0 {
    device_type = “cpu”;
    compatible = “arm,cortex-a53”;
    reg = ;
    – enable-method = “spin-table”;
    – cpu-release-addr = ;
    + enable-method = “psci”;
    };

    cpu1: cpu@1 {
    device_type = “cpu”;
    compatible = “arm,cortex-a53”;
    reg = ;
    – enable-method = “spin-table”;
    – cpu-release-addr = ;
    + enable-method = “psci”;
    };

    cpu2: cpu@2 {
    device_type = “cpu”;
    compatible = “arm,cortex-a53”;
    reg = ;
    – enable-method = “spin-table”;
    – cpu-release-addr = ;
    + enable-method = “psci”;
    };

    cpu3: cpu@3 {
    device_type = “cpu”;
    compatible = “arm,cortex-a53”;
    reg = ;
    – enable-method = “spin-table”;
    – cpu-release-addr = ;
    + enable-method = “psci”;
    };
    };
    +
    + psci {
    + compatible = “arm,psci-1.0”, “arm,psci-0.2”;
    + method = “smc”;
    + };
    };

    /* Make the BCM2835-style global interrupt controller be a child of the
    * CPU-local interrupt controller.
    */
    &intc {
    compatible = “brcm,bcm2836-armctrl-ic”;
    reg = ;
    interrupt-parent = ;
    interrupts = ;
    @@ -86,10 +86,11 @@

    &cpu_thermal {
    coefficients = ;
    };

    /* enable thermal sensor with the correct compatible property set */
    &thermal {
    compatible = “brcm,bcm2837-thermal”;
    status = “okay”;
    };
    +

    • I found that with 5.14-rc the USB3 connection worked OK, but the USB2 did not.. I did find that the ‘latest’ version of U-Boot fixed this.. (article to come..)
      RG.

Leave a Reply

Your email address will not be published.

This site uses Akismet to reduce spam. Learn how your comment data is processed.